Dynamic floating-point cancellation detection

نویسندگان

  • Michael O. Lam
  • Jeffrey K. Hollingsworth
  • G. W. Stewart
چکیده

As scientific computation continues to scale, it is crucial to use floating-point arithmetic processors as efficiently as possible. Lower precision allows streaming architectures to perform more operations per second and can reduce memory bandwidth pressure on all architectures. However, using a precision that is too low for a given algorithm and data set will result in inaccurate results. Thus, developers must balance speed and accuracy when choosing the floating-point precision of their subroutines and data structures. We are building tools to help developers learn about the runtime floating-point behavior of their programs, and to help them make implementation decisions regarding this behavior. We propose a tool that performs automatic binary instrumentation of floating-point code to detect mathematical cancellations. In particular, we show how our prototype can detect the variation in cancellation patterns for different pivoting strategies in Gaussian elimination, as well as how our prototype can detect a program’s sensitivity to ill-conditioned input sets. 2012 Elsevier B.V. All rights reserved.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Reducing Latency, Power, and Gate Count with the Tensilica Floating-Point FMA

Today’s digital signal processing applications such as radar, echo cancellation, and image processing are demanding more dynamic range and computation accuracy. Floating-point arithmetic units offer better precision, higher dynamic range, and shorter development cycles when compared to fixed-point arithmetic units. Minimizing the design’s time to market is more important than ever. Algorithm de...

متن کامل

Automated Floating-Point Precision Analysis

Title of dissertation: Automated Floating-Point Precision Analysis Michael O. Lam, Doctor of Philosophy, 2014 Dissertation directed by: Professor Jeffrey K. Hollingsworth Department of Computer Science As scientific computation continues to scale upward, correct and efficient use of floating-point arithmetic is crucially important. Users of floating-point arithmetic encounter many problems, inc...

متن کامل

An FPGA-based Floating Point Unit for Rounding Error Analysis

Detection of floating-point rounding errors normally requires run-time analysis in order to be effective and software-based tools are seldom used due to the extremely high computational demands. In this paper we present a field programmable gate array (FPGA) based floating-point coprocessor which supports standard IEEE-754 arithmetic, user selectable precision and Monte Carlo Arithmetic (MCA). ...

متن کامل

Estimation of Cancellation Errors in Multivariate Hensel Construction with Floating-Point Numbers

Multivariate Hensel construction with floating-point numbers often cause large cancellation errors which are errors due to a cancellation of almost the same numbers. Sasaki and Yamaguchi [SY98] showed that multivariate Hensel construction causes large cancellation errors if the expansion point is chosen near a singular point, and Sasaki [Sas00] studied four mechanisms of term cancellations near...

متن کامل

An FPGA-Based Face Detector Using Neural Network and a Scalable Floating Point Unit

The study implemented an FPGA-based face detector using Neural Networks and a scalable Floating Point arithmetic Unit (FPU). The FPU provides dynamic range and reduces the bit of the arithmetic unit more than fixed point method does. These features led to reduction in the memory so that it is efficient for neural networks system with large size data bits. The arithmetic unit occupies 39~45% of ...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:
  • Parallel Computing

دوره 39  شماره 

صفحات  -

تاریخ انتشار 2013